1. Technical Field
The present invention relates to a semiconductor wafer, a semiconductor device, and a method of producing a semiconductor wafer.
2. Related Art
Patent Document 1 discloses a CMOS integrated circuit having GaAs/Ge crystal grown on a GaAs layer formed on an Si wafer. In this CMOS integrated circuit, a GaAs well is used as an N-channel device, and a Ge well is used as a P-channel device. An oxide is formed between the GaAs well and the Ge well to separate them, and a semi-insulating (undoped) layer made of GaAs is formed between the GaAs and Ge wells and Si to eliminate the possibility of latch-up.    (Patent Document 1) Japanese Patent Application Publication No. 2001-93987